-to-converters
are presented with emitter open control of bipolar power transistors.ABSTRACT. The main Quasi-Resonant Zero-Voltage Switching
converters with Quasi-SquareWave voltage waveforms are observed. Universal formulas for
basic types are derived. New clamping circuit is proposed. Practical recomendations for
their usage is given. Isolated-to-converters
are presented with emitter open control of bipolar power transistors.
The main obstacle in decreasing weight and size of
are switching losses, which are
frequency dependable. The switching losses in the power transistors consist, firstly, of
turn-on losses 
, caused by a discharge of the
both parasitic capacities of the transistor and primary winding of the power transformer (Cp=0.5-1nF), and, secondly, losses determined by
dynamics of turn-off of the transistor
. For example, in classical single
switch off-line converter with 
and clock frequency fo=20kHz, switched current Ik=2A
and current fall time Dt=1ms, the switching losses are rather
high — DP1@3W and DP2@4W. For minimization of DP2, snubber circuits forming a turn-off trajectory
are usually used. They are based on decreasing voltage front slope during turn-off, but
frequently (especially, RCD) themselves create additional losses of power
. Clamping
circuits added for suppression of parasitic burst of a voltage can also be sources of
losses, caused by leakage inductance of the power transformer 
.
These drawbacks are absent in the majority of quasi-resonant
-converters, in which turn-on losses
are absent, and the favorable trajectory of turn-off of power transistors can be ensured by artificial increase of parasitic capacitance
playing a highly useful role here. Since a level of switching losses and 
directly
depends on current and voltage differentials at switching intervals, a-converters by
these parameters are the best of known. Unfortunately the main drawback of classical types
of
-converters
[K-H.Liu, F.C.Lee "Zero-Voltage Switching Technique in-to-Converters" IEEE PESC,1986, P. 58-70] is
resonance character of transistor voltage, whose amplitude is dependable of load current,
minimal value of which is determined by the ability of resonance capacitor recharge. Such
features make difficult using them as off-line power supplies with wide load range. There
is particular set of-converters with quasi-square wave voltage waveforms, lacking the above
drawback, which are best for use as off-line converters.
As is known, a distinctive feature of the-converters
is presence of an inverse current previous to a direct current of power switches on an
interval of conductivity. This property dramatically simplifies a snubber circuit, which
is reduced to the sole capacitor connected in parallel to a primary winding of the power
transformer, and the losses associated with its recharge are absent. The most known
of them are classical resonant converters, operated above resonance frequency
[R.L.Steigerwald "A Comparison of Half-Bridge Resonant Converter Topologies"
IEEE Transactions On Power Electronics, Vol.3, No.2, April 1988]. Since the switching
current of the latter is quasi-sinusoidal, I will not observe them, because the proposed
later new proportional charge controlling technique for bipolar transistors, is not
applicable to them.
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The basic types of
-converters
were fully observed in [V.Vorperian "Quasi-Square-Wave Converters: Topologies and
Analysis" IEEE Transactions on Power Electronics, Vol.3, No.2 April, 1988]. The
practical usage of such converters is the main aim of the following material.
Fig. 1 shows the basic types of-converters. In the
above article I showed that Cuk-converter is a two windings modification of Flyback, so it
is not included in basic set here. Additional diode is provided for passing inverse
current. Later I will show that it is unnecessary to connect diod directly in parallel to
power transistor. In-converters the presence
of the snubber capacitor Co is unnecessary,
but it decreases power losses by slowering down the rise of a transistor voltage. Note,
that a classical quasi-resonantconverters with
quasi-sinusoidal form of a switched voltage without this capacitor are unworkable, since
it is a necessary element of resonance contour there.
The point A of each circuit has floating potential while any other - fixed, so Co can be connected to any of the circuit elements except Vi and Vo. In my opinion, the best place for Co is in parralell to transistor, because of lowest leakage inductances what minimizes the power switch surge voltage. The main advantage of the topologies is their ability to work with open circuit output. Fig. 2 presents common diagrams for any of the converters.
The diagrams on fig. 2 are common for any of the examined converters. The control of the output power is provided by adjustment of transistor turn-on time. Since all converters have similar diagrams I decided to derive a universal set of equations irrespective of converter topology. Below I describe a way how I finally got them. At first I needed to tie up input current and the diode VD current in common universal expression. I reasoned as follows.
Amplitude of a switched current amplitude I1 is a
function of load current Io. For Boost and Flyback the load current is equal to
average current of the diode VD: Io= IVD. Contrary to
them, in Buck - the load current is equal to the sum of average values of the input and
the diode currents: Io= Ii+ IVD. On assumption of
100% efficiency, from power balance Po=Pi we have for any converter: Ii=IoЧVo/Vi. So for Buck we get: Io=IVDЧVi/(Vi-Vo). Last expression converts to the universal form
independent of concrete topology after being written down as: Io=IVDЧVi/Vx, where Vx and Vy -
inductance voltages during the turn-on and turn-off of
the switch VS respectively. Their values for each topology are:
| Buck | Boost | Flyback | |
| Vx= | Vi-Vo | Vi | Vi |
| Vy= | Vo | Vo-Vi | Vo |
For shortness I omit equations for each interval of the period.
After substitution IVD=I3Чt34/T into the obvious expression for
inductance current at the moment t3:
we
receive the first equation in the resulted set, the second equation of which is a period
of working frequency and is equal to the sum of separate intervals: T=(t01+t13+t34+t45):
,
where 
. This final set
of equations is enough to calculate Lo
and I1 for a given values of T, Vx, Vy and Co in practical converter and for further analysis in
any regime. Note, that in open cirquit mode, when Io=0, the working frequency is the highest and above set of equations is the
simplest.
Since the inductance current at the moment t0 is equal to 
, which is to be always negative, it is obvious that inequality Vy>Vx
is the necessary condition for implementing the feature in any converter,
from which, referring the above table, we can get a relationship between Vi and Vo for each topology:
| Buck | Boost | Flyback |
| Vi>Vo>Vi/2 | Vo>2Vi | Vo>Vi |
The limited output voltage range may seem a limitation for choosingconverter, but
this can easily be overcomed by using inductance with central tap, to which either diod VD
or switch VS can be connected. The other method to obtain any output voltage is by using
isolated converters.
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Flyback from the Fig. 3 is the simplest among isolated
converters.
The above analytical results are still applicable to its equivalent scheme on condition of
substitution output voltage with the value: Vo·w1/w2 in the formulas. The main difference of the isolated compared to basic topology is large value of
leakage inductance Ls of the power
transformer, that can cause a destructive surge voltage DVs
on the power switch VS. To suppress it I invented the original snubber circuit, which
causes no power losses in converter due to its recuperative character (Fig.
3).
I reasoned as follows. While using a capacitor (Cc) as clamping device, we need to prevent it from discharge during reversing voltage on the transformer winding w1, so a diode connected in series with capacitor is obligatory. On the other hand, we need to provide a path for discharging current, or else, after some cycles, the clamping capacitor Cc will charge to maximum surge voltage itself. Usually a resistor, connected in parallel with Cc is used for such a purpose, but the main drawback of this method are severe power losses due to high voltage applied to the resistor. Extremely effective method of clamping surge voltage was proposed by A.Polikarpov. It is based on switching on a second transistor connected in parallel with clamping diode in reverse phase to the main power switch VS. So, during the main switch VS off-time, the Ls current flows to Cc and than the same portion of charge returns back to primary winding w1.
I propose more simple two-leads circuit providing the same results with no need of any external control. Its principle is clear from the experimental diagrams of Fig. 4. The exponential character of the collector current iK is due to the low Q-factor of the experimental transformer. In the ideal case diagrams would look like shown on fig. 4b.
From the linearised diagrams, the expression for evaluating the surge
voltage can easily be derived on condition of zero voltage balance in Lc
and zero current balance in Cc during the period t0-t4. Assuming the equal
forward voltage drop on the diode VDc and the base-emitter leads of transistor VTc, we
finally receive very simple expression for calculating Lc:
.
Fig. 5 presents the results of experimental verification of the last expression.
Note that connecting high-voltage flyback diode in parallel to bipolar power transistor VS1 is no longer necessary, because there is much more effective way for passing inverse current through bipolar transistor.Connecting low-voltage diode contrary to the base-emitter leads provides necessary path through base-collector layer.
The main disadvantage of the above converter is it's high collector current amplitude, which is at least 4 times higher than the average input current. The second disadvantage is in high input and output pulsations due to discontinuous input and output currents, what leads to necessity of additional LC-filters. Unfortunately zero-ripple configuration is less effective here due to the wide range of working frequency.
Although there is a--converter modification, where zero
ripple technique can be very effective.
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This converter belongs to the isolated implementation of basic Buck
converter family and was proposed by A.Polikarpov (Moscow Power Energy Institute). The
main peculiarity of his converter compared to widely known isolated Buck-topology is
additional capacitor and transistor switch VT2 (Fig. 6), which opens in counterphase to
main switch VS1. Addtion a single capacitor Co in
parallel to VS2 transforms the converter to topology. Diagrams
were drawn on condition of infinity value of the output choke Lf. So the slope of VS1 collector current is due to finite value of the inductance
of the transformer primary winding w1, which
should be large enough to provide capacitor Co
recharge during converter open circuit mode.
Although the additional circuit VS2-Co behaves like
clamping circuit from the above paragraph, it strongly changes the behavior of the
isolated buck-converter. In my article ["Influence of the Transformer Leakage
Inductance on the Behavior of the Off-Line Converter" Scientific Works of 
, 1986,
p.116-123] I analyzed the above scheme withoutcapacitor Co and got the following regulating characteristic for the converter and Co voltage:
,
where n=w2/w1, G=ton/T, ton - turn-on time of VS1, T - clock period, Io - output current (w2=w2'=w2'', Ls=Ls'=Ls'').
Contrary to the previous clamping circuit with independent second switch,
it is necessary now to avoid simultaneous conductivity of both bipolar transistors, caused
by their switching-off inertia. So, high voltage
is highly
preferable as single switch VS2.
Due to constant clock generator frequency it is possible to use zero-ripple filter instead of Lf here.
Since the above converter has two switching devices the topology practically has no advantages compared to half bridge converters.
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The topology of thisconverter is well known and its
main difference from the classical configuration is in presence of the resonant elements
Lo and Co (Fig.7a). On condition of Lf=Ґ
and Co=0 the assessing of converter parameters is very
simple. The optimum value of the transformer gain (n=w2/w1)
is about n=0.5Vi/Vo, so, for given parameters Vo and T, the
value of Lo can easily be assessed as equal to
. Note that choke Lo
can be placed either at the primary or secondary side of the transformer TV, with values
corresponding to the transformer gain "n".
There is no need to use external choke at high frequencies, because some times the leakage inductance (Lo=Ls) is enough for that. If frequencies are about 20kHz it is more convenient to use integrated transformer instead of two separate magnetic elements, as shown on fig.7b. It is seen that after short cicuiting the secondary winding w2 the value of Lo can be measured directly from the primary side of the transformer. From the voltsecond analysis it's easy to show that the lower tore core cross section is to be twice larger than upper. In practice I use identical ferrite cores one for upper and two for lower part, where the upper one has an air gap to provide necessary inductance Lo. If the winding is spread evenly across the core, the expression, I'm always using for calculating air gap width for given Lo, is quite precise. I omit it here because not sure it is universal for all types of tore.
The main drawback of theconverter is its inability of
continuous mode commutation at small output currents. The main advantage of the half
bridge topology is absence of constant current bias, causing assymetrical working of the
switches. In spite of this advantage I prefer central tapconverters because of very simple
controlling cirquit.
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The-converter basic configuration is shown at Fig.8 and its major
difference from classical one is in integrated transformer (similar to fig.7b), resonant
capacitor Co and emitter open transistor VT3. As can be
seen, the power transistors are connected in common base configuration, where the limits the emitter current of conducting power transistor. At the beginning
of power transistor desaturation VT3 opens emitter circuit for a short time, until the
adjacent transistor opens due to inverse current. As can be seen, there are no more
flyback diodes in parallel to the power transistors VT1 and VT2, so the inverse current
flows directly through the base winding w3
and a collector-base barrier, effectively saturating the opening transistor.
Such opening mode is very useful, because it speeds up modulation of high resistance collector layer and lessens the overall power transistor losses. Although opening emitter circuit increases the firmness of bipolar transistors to secondary breakdown, it causes considerable increasing of collector current fall down time especially of the deeply saturated transistor. The original method overcoming the last drawback is to be discussed in the next article. There I will also show practical scheme of the converter, because the depicted one can not be easily started due to the power transistors bases grounded via w3.
The diagrams for the power transistors are the same as in Fig7. Equations for Lo value are also valid here. More thorough analysis of the topology I made in my thesis and omit here.
The w3 turns ratio should be chosen as small as possible, to minimize the power losses in VT3.
This converter has the same drawback as the previous one, i.e. inability of continuous mode commutation at small output currents. Fortunately I've found a very simple way to overcome it... The second major drawback of the topology is high switching voltage amplitude, which is twice as high than the input voltage. So let us have a look at a bridge topology, where switching voltage is always equal to input voltage.
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The idea of operating the bridge - converter with a single switch seemed
to me very attractive, but opening emitters of all four transistors by a single switch
seemed impossible. However, finally I came to the configuration, shown on fig.9, where
that desire was successfully implemented.
The elements VD1,C1,R1 are needed for starting the converter and also must
be added to scheme at fig.7a. So the power transistors VT1a and VT2a are operating in the
same way as in central tap transformer converter. The current transformers
TA1 and TA2 are added for simultaneous opening of the corresponding upper transistors VT1b
and VT2b. The current transformers are connected in emitters for two reasons. Firstly, to
provide free path for converter inverse current. Secondly, to open emitter of
corresponding upper transistor after turning-off of a lower one. It happens as follows.
Since the magnetic flux current flows opposite to open transistor base current, after
turn-off of lower transistor the base current reverses and effectively opens the emitter.
So there is no need to use separate solid state switches for each of the power transistor.
Power losses in VT3 can be very high due to active mode operation during the switch-on
time.
The above scheme is not patented yet, so if you will be fast enough, you may try to forestall me. Do not forget to place my name near yours... J
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The discussed converters are very attractive by their simplicity and low.
Moreover, if the load is of resistive kind, the converters from fig.7-9 can easily be
converted to-to-
mode by excluding
rectifiers and choke Lf from the secondary circuit , what is
useful for instance for powering the ordinary hot spiral lamps.
The power transistors emitter open control method can be easily incorporated there. Unfortunately it is characterized by the long fall down time of collector current causing considerable power losses. Decreasing the "active" power losses in emitter current control transistor is also highly desirable. So the additional investigations are needed to optimize the overall converter efficiency. I present them in the next article.
It is seen from the above, that working out an efficient power supply is a complex problem, needing the deep understanding of electromagnetic processes and physical effects in all converter elements. So, let us turn now to solid state power devices...
© Igor Gorianski.
January 1998.
Revised 9.01.98
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